JPH0324069B2 - - Google Patents
Info
- Publication number
- JPH0324069B2 JPH0324069B2 JP56138833A JP13883381A JPH0324069B2 JP H0324069 B2 JPH0324069 B2 JP H0324069B2 JP 56138833 A JP56138833 A JP 56138833A JP 13883381 A JP13883381 A JP 13883381A JP H0324069 B2 JPH0324069 B2 JP H0324069B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- region
- crystal silicon
- layer
- element isolation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/112—Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76294—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56138833A JPS5840852A (ja) | 1981-09-03 | 1981-09-03 | 相補型ｍｏｓ半導体装置及びその製造方法 |
| US06/307,877 US4560421A (en) | 1980-10-02 | 1981-10-02 | Semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56138833A JPS5840852A (ja) | 1981-09-03 | 1981-09-03 | 相補型ｍｏｓ半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5840852A JPS5840852A (ja) | 1983-03-09 |
| JPH0324069B2 true JPH0324069B2 (en]) | 1991-04-02 |
Family
ID=15231280
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56138833A Granted JPS5840852A (ja) | 1980-10-02 | 1981-09-03 | 相補型ｍｏｓ半導体装置及びその製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5840852A (en]) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5961119A (ja) * | 1982-09-30 | 1984-04-07 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPS6030169A (ja) * | 1983-07-29 | 1985-02-15 | Toshiba Corp | 相補型ｍｏｓ半導体装置及びその製造方法 |
| JPS6074664A (ja) * | 1983-09-30 | 1985-04-26 | Toshiba Corp | 相補型ｍｏｓ半導体装置の製造方法 |
| JPS6070757A (ja) * | 1983-09-28 | 1985-04-22 | Hitachi Ltd | 半導体集積回路 |
| JPS6089957A (ja) * | 1983-10-24 | 1985-05-20 | Nippon Telegr & Teleph Corp <Ntt> | 相補形半導体装置 |
| DE4020267C1 (en]) * | 1990-06-26 | 1991-10-24 | Mercedes-Benz Aktiengesellschaft, 7000 Stuttgart, De | |
| DE4020266C1 (en]) * | 1990-06-26 | 1991-09-26 | Mercedes-Benz Aktiengesellschaft, 7000 Stuttgart, De | |
| JP2993339B2 (ja) * | 1993-12-03 | 1999-12-20 | ヤマハ株式会社 | 半導体装置の製造方法 |
-
1981
- 1981-09-03 JP JP56138833A patent/JPS5840852A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5840852A (ja) | 1983-03-09 |
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